In many high power electronic applications, it can be cost effective to mount an integrated circuit (IC) chip such as a power transistor directly on a substrate, and to form electrical interconnects between the substrate and conductor pads (also referred to as bond sites) located on the exposed surface of the IC chip. Traditionally, the electrical interconnects have been achieved by wire bonding, with multiple wire bonds per interconnect in cases where high current is required. However, there are cost concerns associated with wire bonding, and it is more attractive in many cases to form the high current interconnects with soldered bar bond connectors, as described for example in the U.S. Pat. Nos. 5,872,403; 6,083,772; and 6,593,527. Essentially, a bar bond connector is simply a strap or bar of solderable highly conductive material such as copper that is preformed to bridge the space between a bond site on the IC chip and a bond site on the substrate adjacent the IC chip. The bar bond connectors can be designed for automated assembly to reduce cost, and provide decreased interconnect resistance and increased interconnect current capacity compared to wire bonding. As shown in the aforementioned U.S. Pat. No. 6,593,527, the bar bond may include a stress relief loop and/or openings intermediate the substrate and the IC chip to increase compliancy so that temperature-related stress tends to be absorbed by flexure of the bar bond connector instead of the solder joints at either end of the bar bond connector.